To Siemens S7-1200: sample program & common input wiring

Engineer-ready. Map a safety light curtain’s OSSD1/OSSD2, EDM, and RESET to Siemens S7-1200 digital inputs (PNP/NPN), with copy-ready I/O list, TIA Portal example logic (standard CPU monitoring and S7-1200F safety option), plus commissioning records.

Safety boundary: A standard S7-1200 CPU is not a safety PLC. The safety stop must be executed by a safety relay/controller + K1/K2 contactors. If you use S7-1200F (F-CPU with F-DI/F-DO and F-program), the safety function may reside in the PLC — still driving force-guided contactors.

1) Common input wiring (PNP / NPN)

PNP (sourcing) — recommended

Light Curtain
  OSSD1 ───────►  I0.0 (DI)
  OSSD2 ───────►  I0.1 (DI)
  EDM FB (K1 NC ─┐
                 ├─►  I0.2 (DI)
           K2 NC ─┘
  RESET PB ─────►  I0.3 (DI, rising-edge)
PLC DI COMMON:   M (0V)
Sensor outputs source +24V into inputs.

S7-1200 DI referenced to M (0 V); OSSD outputs source +24 V.

NPN (sinking)

Light Curtain
  OSSD1 ───────►  I0.0 (pulled to 0V)
  OSSD2 ───────►  I0.1
  EDM FB ──────►  I0.2
  RESET PB ────►  I0.3
PLC DI COMMON:   L+ (+24V)
Sensor outputs sink to 0V.

Do not mix PNP and NPN on the same DI common block.

2) Copy-ready I/O map & naming

VariableAddress (typ.)SourcePurposeRemarks
LC_OSSD_CH_AI0.0OSSD1Safety channel ASeparate harness/fuse
LC_OSSD_CH_BI0.1OSSD2Safety channel BDesync ⇒ fault
LC_EDM_FBI0.2K1/K2 NCEDM feedbackBlocks reset if open
LC_RST_BTNI0.3PushbuttonManual resetRising edge only
LC_STATUS_OKM100.0LogicLC healthyInternal
LC_INTERLOCKM100.1LogicEnable-to-startClears on error

3) Example program — standard S7-1200 (monitoring)

This example is for a non-safety CPU. It provides status & interlock only. The actual safety stop is executed by the external safety relay/controller.

LADDER (conceptual)

// Rung 1: LC_STATUS_OK when OSSD1 & OSSD2 & EDM are TRUE
| I0.0  I0.1  I0.2 |----( M100.0 )

// Rung 2: Rising-edge of RESET enables interlock if status OK
|  I0.3  one-shot  M100.0 |----( M100.1 )  // LC_INTERLOCK

// Rung 3: Auto-cancel interlock on status loss
|  NOT M100.0  |----( R ) M100.1

STRUCTURED TEXT (TIA Portal SCL)

// One-shot rising edge for I0.3
IF (I0_3 = TRUE) AND (RSTprev = FALSE) AND (M100_0 = TRUE) THEN
  M100_1 := TRUE; // LC_INTERLOCK
END_IF;
RSTprev := I0_3;

// Status OK
M100_0 := (I0_0 AND I0_1 AND I0_2);

// Cancel interlock if status lost
IF NOT M100_0 THEN M100_1 := FALSE; END_IF;

4) Example concept — S7-1200F (safety CPU)

With an S7-1200F CPU and certified F-DI/F-DO, implement the safety function in F-blocks and drive K1/K2. Below is a conceptual mapping; use certified F-library blocks and follow your company validation plan.

// F-Logic concept (pseudo)
Inputs:  FDI_OSSD1, FDI_OSSD2, FDI_EDM, FDI_RESET
Block:   F_LightCurtain (dual OSSD + EDM + reset)
Outputs: FDO_SAFE_OUT_A -> K1 coil
         FDO_SAFE_OUT_B -> K2 coil

// Rules:
- Dual-channel equivalency with discrepancy time.
- Monitored manual reset (edge or two-stage).
- EDM feedback required; welded contactors block restart.
- Safe outputs drive force-guided contactors (two channels).

5) Commissioning & periodic verification

  1. Polarity: confirm DI common (PNP→M=0V, NPN→L+). Verify 24 V, 0 V, PE.
  2. Channel coherence: block/release beams; I0.0/I0.1 change together; mismatch faults.
  3. EDM logic: hold a contactor; reset must be inhibited.
  4. Reset behavior: edge or two-stage only; no hold-to-reset.
  5. Safety distance: compute per ISO 13855 and file it with the I/O list and photos.

Self-test record (CSV copy)

Item,Test,Expected,Actual,Result,Notes
1,OSSD channels simultaneous,Both inputs change together,,,
2,Desync detection,Fault on mismatch,,,
3,EDM welded-contact block,Reset inhibited when K1/K2 held,,,
4,Reset function,Only rising-edge/two-stage accepted,,,
5,Interlock cancel,LC_INTERLOCK clears on status loss,,,
6,Records,I/O list + ISO 13855 + photos archived,,,

6) Common mistakes & fixes

MistakeSymptomFix
Mixing PNP/NPN on same DI groupInputs stuck ON/OFFUnify polarity per DI common; segregate wiring
No EDM feedbackRestart despite welded contactorSeries K1/K2 NC back to EDM input
Shared protection for OSSD1/2Single-point failure hiddenSeparate harnesses/fuses
Reset held continuouslyUnintended restart riskEdge or two-stage; audit with counter
Assuming standard CPU is “safe”Compliance failureUse safety relay/controller or S7-1200F with F-I/O

7) FAQ

Can I connect OSSD directly to S7-1200 and perform the stop in PLC?

With a standard CPU: No. PLC only monitors/interlocks. Use a safety relay/controller to cut power. With an S7-1200F and certified F-I/O, implement the safety logic in F-blocks and still drive K1/K2 contactors.

Which polarity should I pick, PNP or NPN?

Prefer PNP for interoperability and clarity. Match the DI common reference and keep all channels in the same polarity domain.

How do I log reset attempts for audits?

One-shot the RESET input and increment a counter with timestamps in a ring buffer. Export during periodic inspections.